Reverse Engineering Integrated Circuits Using Finite State Machine Analysis
Loading...
Date
Contributor
Advisor
Editor
Performer
Department
Instructor
Depositor
Speaker
Researcher
Consultant
Interviewer
Interviewee
Narrator
Transcriber
Annotator
Journal Title
Journal ISSN
Volume Title
Publisher
Journal Name
Volume
Number/Issue
Starting Page
Ending Page
Alternative Title
Abstract
Due to the lack of a secure supply chain, it is not possible \ to fully trust the integrity of electronic devices. Current \ methods of verifying integrated circuits are either destructive \ or non-specific. Here we expand upon prior work, in \ which we proposed a novel method of reverse engineering \ the finite state machines that integrated circuits are built \ upon in a non-destructive and highly specific manner. In \ this paper, we present a methodology for reverse engineering \ integrated circuits, including a mathematical verification of \ a scalable algorithm used to generate minimal finite state \ machine representations of integrated circuits.
Description
Keywords
Citation
Extent
9 pages
Format
Type
Conference Paper
Geographic Location
Time Period
Related To
Proceedings of the 50th Hawaii International Conference on System Sciences
Related To (URI)
Table of Contents
Rights
Attribution-NonCommercial-NoDerivatives 4.0 International
Rights Holder
Catalog Record
Local Contexts
Email libraryada-l@lists.hawaii.edu if you need this content in ADA-compliant format.
