Design Of Front-End Amplifier For Optical Receiver In 0.5 Micrometer CMOS Technology

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University of Hawaii at Manoa

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The need for high speed optical receivers are being driven by high speed and wide bandwidth optical communications demands. The front-end amplifier is a critical part in optical receiver. Traditionally, it has been fabricated in expensive Gallium Arsenide and silicon bipolar technologies. However, the quest for low cost, low power consumption and small silicon area solutions in the commercial market has spurred a desire to implement the circuit in Complementary Metal Oxide Semiconductor (CMOS) technology. This thesis describes the design of the front-end amplifier using AMI 0.5 CMOS process. The target data rate is at least 500Mb/s suitable for local area network application. The front-end amplifier is divided into two stages, the transimpedance amplifier (TIA) and the limiter amplifier (LA). The resistive feedback TIA topology is selected for the TIA design. The LA circuit is realized by cascading two resistive load differential amplifiers with one buffer. The simulation results show that the designed TIA achieves 374.4MHz bandwidth with a corresponding achievable data rate of ~535Mb/s. Its transimpedance gain is 4 kΩ The LA bandwidth is 586.8MHz and the output swing is 4.2V. The fabricated TIA and the front-end amplifier are experimentally tested to validate performance in the frequency range up to 24MHz. The simulation and the experimental results exhibit good agreement at these frequencies.

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Theses for the degree of Master of Science (University of Hawaii at Manoa). Electrical Engineering; no. 4007

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