A wideband CMOS low-noise amplifier for UHF applications

Abstract

A design of a wideband CMOS low-noise amplifier for UHF applications is explored in this thesis, A single stage amplifier in inverter with resistive feedback topology was found to be the most suitable configuration to achieve goals of low noise figure, high linearity, small size, and low cost. Two submicron silicon CMOS processes, AMIS 0.5 µm and TSMC 0.25 µm, were considered for fabrication of this amplifier. Active and passive device performance in these two processes were, investigated to determine the feasibility of UHF amplifier implementation. Wideband LNAs were fabricated in both processes, and it was demonstrated that 0.25 µm amplifier meets and exceeds the design specifications. This amplifier achieves a bandwidth of close to 600MHz, with gain of over 11 dB over the entire bandwidth, and noise figure lower than 2 dB in the frequency range of 240 MHz to 1.6 GHz. In addition, this amplifier exhibits good input and output matches of lower than -10dB including bond wires, and has better linearity and noise figure than other wide-band LNA's published to date. Finally the system level performance of a heterodyne receiver was evaluated with LNA behavioral model to show the feasibility of using this LNA for UHF communications and radar applications .