The Design, Characterization, and Testing of the CRYO ASIC Front End Motherboard for the Deep Underground Neutrino Experiment

Abstract

The Deep Underground Neutrino Experiment is currently in its design and testing stages where two sets of detectors will be used, 1300 km apart. The Far Detector will be the largest liquid argon neutrino detector ever built, and will incorporate 4 separate modules, each containing 10 kilotons of liquid argon. The electronics internal to these modules make use of wire planes that interface to a Front End Motherboard. Here we design a potential board which incorporates the CRYO ASIC.[18] We discuss the testing of this design, as well as the revisions made for the most recent version. We present the noise measurements across the electronics and all input channels and determine them to meet the specifications of < 1000 electrons per channel. We compare the power spectra to simulation and determine the level of capacitance and external shielding needed to yield the desired results. Further testing within liquid nitrogen models predicted performance at liquid argon temperature, and these tests expose areas where better quality yield is required. The continuation of design of these electronics will be tested within the ICEBERG detector at Fermilab, and become one of the potential solutions to be incorporated in the DUNE Far Detector, 2029.